| Project |
| Acronym: |
VFD SONFET |
| Name: |
Vertical fully depleted Silicon-on-nothing MOS Field-effect Transistor (VFDSONFET) for high frequency, radiation-hard applications
|
| Project status: |
From: 2003-01-01
To: 2005-12-31
(Completed)
|
| Contract number: |
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| Action line: |
|
| Type (Programme): |
MULTILAT |
| Instrument: |
|
| Project cost: |
- |
| Project funding: |
- |
| Project coordinator |
| Organisation Name: |
University of the German Federal Armed Forces Munich |
| Organisation adress: |
Institute of Physics, D-5577 Neubiberg |
| Organisation country: |
Njemačka |
| Contact person name: |
|
| Contact person email: |
|
| Croatian partner |
| Organisation name: |
Fakultet elektrotehnike i računarstva |
| Organisation address: |
ZEMRIS, Unska 3, 10000 Zagreb |
| Contact person name: |
Tomislav Suligoj
|
| Contact person tel: |
| +385 1 6129898 |
Contact person fax: |
+385 1 6129653 |
|
| Contact person e-mail: |
Email |
| Partners |
| Organisation name | Country |
| US Naval Research Laboratory (NRL), Washington (DC) | Sjedinjene američke države |
|
| Short description of project |
| The objective of the project is the development of a process for the fabrication of vertical fully-depleted Si-on-nothing MOS Field-effect Transistors which have the potential for ultra-thin Channel length (<20nm) without e-beam lithography or ion implanted Source-Drain contacts. The potential benefits of this strucuture are:
1. Ultra-short Channel length CMOS without E-beam lithography is compatible with large scale manufacturing,
2. Source/Drain contacts formed without ion implantation eliminating problems with dopant enhanced diffusion during activation,
3. The combination of ultra-short Channel length and the elimination of a substrate under the gate make this an ideal candidate for high frequency operation,
4. The elimination of the substrate under the gate should make this device intrinsically radiation tolerant. |
| Short description of the task performed by Croatian partner |
| Design of the the novel Vertical fully-depleted Si-on-nothing MOS Field-effect Transistors. Mask design. Technology flowchart design. Process and device simulation. Data interpretation and modeling. |
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